Issued Patents 2017
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9851777 | Power gating based on cache dirtiness | Manish Arora, Indrani Paul, Yasuko Eckert, Srilatha Manne, Madhu Saravana Sibi Govindan +1 more | 2017-12-26 |
| 9818455 | Query operations for stacked-die memory device | Gabriel H. Loh, James M. O'Connor, Yasuko Eckert | 2017-11-14 |
| 9804996 | Computation memory operations in a logic layer of a stacked memory | James M. O'Connor, Gabriel H. Loh, Michael Ignatowski, Michael Schulte | 2017-10-31 |
| 9792961 | Distributed computing with phase change material thermal management | Manish Arora, Gabriel H. Loh, Michael Schulte, Srilatha Manne | 2017-10-17 |
| 9755964 | Multi-protocol header generation system | David A. Roberts, Michael Ignatowski, Gabriel H. Loh | 2017-09-05 |
| 9720487 | Predicting power management state duration on a per-process basis and modifying cache size based on the predicted duration | William L. Bircher, Madhu Saravana Sibi Govindan, Manish Arora, Michael Schulte | 2017-08-01 |
| 9535831 | Page migration in a 3D stacked hybrid memory | Gabriel H. Loh, James M. O'Connor, Niladrish Chatterjee | 2017-01-03 |