Issued Patents 2016
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9502559 | Dislocation stress memorization technique (DSMT) on epitaxial channel devices | Tsung-Hsing Yu, Shih-Syuan Huang, Ken-Ichi Goto | 2016-11-22 |
| 9502409 | Multi-gate semiconductor devices | Jon-Hsu Ho, Chih-Ching Wang, Ching-Fang Huang, Wen-Hsing Hsieh, Tsung-Hsing Yu +3 more | 2016-11-22 |
| 9502253 | Method of manufacturing an integrated circuit | Zhiqiang Wu, Tsung-Hsing Yu, Kuan-Lun Cheng, Chih-Pin Tsao, Wen-Yuan Chen +2 more | 2016-11-22 |
| 9455346 | Channel strain inducing architecture and doping technique at replacement poly gate (RPG) stage | Zhiqiang Wu, Tzer-Min Shen, Chun-Fu Cheng, Hong-Shen Chen | 2016-09-27 |
| 9425099 | Epitaxial channel with a counter-halo implant to improve analog gain | Tsung-Hsing Yu, Shih-Syuan Huang, Ken-Ichi Goto | 2016-08-23 |
| 9419136 | Dislocation stress memorization technique (DSMT) on epitaxial channel devices | Tsung-Hsing Yu, Shih-Syuan Huang, Ken-Ichi Goto | 2016-08-16 |
| 9349655 | Method for mechanical stress enhancement in semiconductor devices | Carlos H. Diaz, Anson Wang, Kong-Beng Thei, Sheng-Chen Chung, Hao-Yi Tsai +3 more | 2016-05-24 |
| 9281372 | Metal gate structure and manufacturing method thereof | Shin-Jiun Kuang, Tsung-Hsing Yu, Chun-Yi Lee | 2016-03-08 |
| 9252236 | Counter pocket implant to improve analog gain | Shih-Syuan Huang, Tsung-Hsing Yu | 2016-02-02 |