JT

Jerzy Tyszer

MG Mentor Graphics: 4 patents #3 of 99Top 4%
Overall (2016): #41,846 of 481,213Top 9%
4
Patents 2016

Issued Patents 2016

Patent #TitleCo-InventorsDate
9377508 Selective per-cycle masking of scan chains for system level test Janusz Rajski, Dariusz Czysz, Grzegorz Mrugalski, Nilanjan Mukherjee 2016-06-28
9347993 Test generation for test-per-clock Janusz Rajski, Jedrzej Solecki, Grzegorz Mrugalski 2016-05-24
9335377 Test-per-clock based on dynamically-partitioned reconfigurable scan chains Janusz Rajski, Jedrzej Solecki, Grzegorz Mrugalski 2016-05-10
9250287 On-chip comparison and response collection tools and techniques Nilanjan Mukherjee, Janusz Rajski 2016-02-02