Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9477441 | Double rounded combined floating-point multiply and add | Sridhar Samudrala, Grigorios Magklis, David R. Ditzel | 2016-10-25 |
| 9389871 | Combined floating point multiplier adder with intermediate rounding logic | Grigorios Magklis, Sridhar Samudrala, Raul Martinez, Kyriakos A. Stavrou, Enric Gibert Codina | 2016-07-12 |
| 9329848 | Mechanism for facilitating dynamic and efficient fusion of computing instructions in software programs | Raul Martinez, Enric Gibert Codina, Kyriakos A. Stavrou, Grigorios Magklis, Sridhar Samudrala | 2016-05-03 |