Issued Patents 2016
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9519747 | Dynamic and adaptive timing sensitivity during static timing analysis using look-up table | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, David J. Hathaway, Jeffrey G. Hemmett +6 more | 2016-12-13 |
| 9501609 | Selection of corners and/or margins using statistical static timing analysis of an integrated circuit | Jeffrey G. Hemmett, Kerim Kalafala, Gregory M. Schaeffer, Stephen G. Shurma, Alexander J. Suess +3 more | 2016-11-22 |
| 9495497 | Dynamic voltage frequency scaling | Nathan C. Buck, Jeffrey G. Hemmett, Kerim Kalafala, Gregory M. Schaeffer, Stephen G. Shuma +4 more | 2016-11-15 |
| 9483604 | Variable accuracy parameter modeling in statistical timing | Jeffrey G. Hemmett, Kerim Kalafala, Gregory M. Schaeffer, Stephen G. Shuma, Alexander J. Suess +2 more | 2016-11-01 |
| 9430603 | Scaling voltages in relation to die location | Nazmul Habib, Kerim Kalafala | 2016-08-30 |
| 9378328 | Modeling multi-patterning variability with statistical timing | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, Peter A. Habitz, David J. Hathaway +4 more | 2016-06-28 |
| 9348962 | Hierarchical design of integrated circuits with multi-patterning requirements | Nathan C. Buck, Brian M. Dreibelbis, John P. Dubuque, David J. Hathaway, Jeffrey G. Hemmett +3 more | 2016-05-24 |
| 9269407 | System and method for managing circuit performance and power consumption by selectively adjusting supply voltage over time | Jeanne P. Bickford, Mark W. Kuemerle, Susan K. Lichtensteiger | 2016-02-23 |
| 9262569 | Balancing sensitivities with respect to timing closure for integrated circuits | Jeanne P. Bickford, David J. Hathaway | 2016-02-16 |