Issued Patents 2016
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9465647 | Providing state storage in a processor for system management mode selectively enabled by register bit instead of external SMRAM | Mahesh S. Natu, Thanunathan Rangarajan, Gautam Doshi, Shamanna M. Datta, Baskaran Ganesan +4 more | 2016-10-11 |
| 9454380 | Computing platform performance management with RAS services | Sarathy Jayakumar, Jose A. Vargas | 2016-09-27 |
| 9448879 | Apparatus and method for implement a multi-level memory hierarchy | Theodros Yigzaw, Oded Lempel, Hisham Shafi, Geeyarpuram N. Santhanakrishnan, Jose A. Vargas +6 more | 2016-09-20 |
| 9448867 | Processor that detects when system management mode attempts to reach program code outside of protected space | Shamanna M. Datta, Rajesh S. Parathasarathy, Mahesh S. Natu, Frank Binns | 2016-09-20 |
| 9430372 | Apparatus, method and system that stores bios in non-volatile random access memory | Murugasamy K. Nachimuthu | 2016-08-30 |
| 9423959 | Method and apparatus for store durability and ordering in a persistent memory architecture | Subramanya R. Dulloor, Sanjay Kumar, Rajesh M. Sankaran, Gilbert Neiger, Richard Uhlig +7 more | 2016-08-23 |
| 9411667 | Recovery after input/ouput error-containment events | Sarathy Jayakumar, Jose A. Vargas | 2016-08-09 |
| 9405646 | Method and apparatus for injecting errors into memory | Theodros Yigzaw, Kai Cheng, Jose A. Vargas, Gopikrishna Jandhyala | 2016-08-02 |
| 9396059 | Exchange error information from platform firmware to operating system | Ashok Raj, Narayan Ranganathan | 2016-07-19 |
| 9383932 | Data coherency model and protocol at cluster level | Debendra Das Sharma, Balint Fleischer | 2016-07-05 |
| 9378133 | Autonomous initialization of non-volatile random access memory in a computer system | Murugasamy K. Nachimuthu, Dimitrios Ziakas | 2016-06-28 |
| 9372752 | Assisted coherent shared memory | Debendra Das Sharma, Balint Fleischer | 2016-06-21 |
| 9342394 | Secure error handling | Murugasamy K. Nachimuthu, Theodros Yigzaw, Jose A. Vargas, Rajender Kuramkote | 2016-05-17 |
| 9323539 | Constructing persistent file system from scattered persistent regions | Anil S. Keshavamurthy, Murugasamy K. Nachimuthu | 2016-04-26 |
| 9317429 | Apparatus and method for implementing a multi-level memory hierarchy over common memory channels | Raj K. Ramanujan, Dimitrios Ziakas, David J. Zimmerman, Muthukumar P. Swaminathan, Bassam N. Coury | 2016-04-19 |
| 9317360 | Machine check summary register | Jose A. Vargas, James B. Crossland, Murugasamy K. Nachimuthu, Theodros Yigzaw | 2016-04-19 |
| 9311138 | System management interrupt handling for multi-core processors | Sarathy Jayakumar, Michael Kinney | 2016-04-12 |
| 9292683 | Computing device security | Gyan Prakash, Shahrokh Shahidzadeh, Venkatesh Ramamurthy, Hong Li | 2016-03-22 |
| 9269438 | System and method for intelligently flushing data from a processor into a memory subsystem | Murugasamy K. Nachimuthu | 2016-02-23 |
| 9256493 | Memory module architecture | Murugasamy K. Nachimuthu, Debaleena Das, Dimitrios Ziakas | 2016-02-09 |
| 9230116 | Technique for providing secure firmware | Shamanna M. Datta | 2016-01-05 |