Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9476940 | Boundary scan chain for stacked memory | — | 2016-10-25 |
| 9418700 | Bad block management mechanism | Raj K. Ramanujan, Glenn J. Hinton | 2016-08-16 |
| 9317429 | Apparatus and method for implementing a multi-level memory hierarchy over common memory channels | Raj K. Ramanujan, Dimitrios Ziakas, Mohan J. Kumar, Muthukumar P. Swaminathan, Bassam N. Coury | 2016-04-19 |
| 9298573 | Built-in self-test for stacked memory architecture | Darshan Kobla, Vimal Natarajan | 2016-03-29 |
| 9236143 | Generic address scrambler for memory circuit test engine | Darshan Kobla, Vimal Natarajan | 2016-01-12 |