Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9448879 | Apparatus and method for implement a multi-level memory hierarchy | Theodros Yigzaw, Oded Lempel, Hisham Shafi, Geeyarpuram N. Santhanakrishnan, Jose A. Vargas +6 more | 2016-09-20 |
| 9348591 | Multi-level tracking of in-use state of cache lines | Ilhyun Kim, Alexandre J. Farcy, Robert L. Hinton, Choon Wei Khor, Lihu Rappoport | 2016-05-24 |