Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9418009 | Inclusive and non-inclusive tracking of local cache lines to avoid near memory reads on cache line memory writes into a two level system memory | Adrian C. Moga, Vedaraman Geetha, Robert G. Blankenship, Yen-Cheng Liu, Jeffrey D. Chamberlain +1 more | 2016-08-16 |
| 9405687 | Method, apparatus and system for handling cache misses in a processor | Samuel D. Strom, Vedaraman Geetha, Robert G. Blankenship, Yen-Cheng Liu, Krishnakumar Ganapathy +1 more | 2016-08-02 |