Issued Patents 2016
Showing 26–50 of 164 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9489229 | Transparent dynamic code optimization | — | 2016-11-08 |
| 9483295 | Transparent dynamic code optimization | — | 2016-11-01 |
| 9483267 | Exploiting an architected last-use operand indication in a system operand resource pool | Valentina Salapura | 2016-11-01 |
| 9483180 | Memory-area property storage including data fetch width indicator | Jose E. Moreira, Balaram Sinharoy | 2016-11-01 |
| 9483179 | Memory-area property storage including data fetch width indicator | Jose E. Moreira, Balaram Sinharoy | 2016-11-01 |
| 9477474 | Optimization of instruction groups across group boundaries | — | 2016-10-25 |
| 9477469 | Branch predictor suppressing branch prediction of previously executed branch instructions in a transactional execution environment | Valentina Salapura, Chung-Lung K. Shum | 2016-10-25 |
| 9477481 | Accurate tracking of transactional read and write sets with speculation | Valentina Salapura, Chung-Lung K. Shum | 2016-10-25 |
| 9477468 | Character data string match determination by loading registers at most up to memory block boundary and comparing to avoid unwarranted exception | Jonathan D. Bradbury, Timothy J. Slegel | 2016-10-25 |
| 9471312 | Instruction to load data up to a dynamically determined memory boundary | Jonathan D. Bradbury, Christian Jacobi, Eric M. Schwarz, Timothy J. Slegel | 2016-10-18 |
| 9471313 | Flushing speculative instruction processing | Fadi Y. Busaba, Chung-Lung K. Shum | 2016-10-18 |
| 9471340 | Global entry point and local entry point for callee function | Ulrich Weigand | 2016-10-18 |
| 9471371 | Dynamic prediction of concurrent hardware transactions resource requirements and allocation | Fadi Y. Busaba, Dan F. Greiner, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum | 2016-10-18 |
| 9465746 | Diagnostics for transactional execution errors in reliable transactions | Valentina Salapura | 2016-10-11 |
| 9459868 | Instruction to load data up to a dynamically determined memory boundary | Jonathan D. Bradbury, Christian Jacobi, Eric M. Schwarz, Timothy J. Slegel | 2016-10-04 |
| 9460020 | Diagnostics for transactional execution errors in reliable transactions | Valentina Salapura | 2016-10-04 |
| 9459867 | Instruction to load data up to a specified memory boundary indicated by the instruction | Jonathan D. Bradbury, Christian Jacobi, Eric M. Schwarz, Timothy J. Slegel | 2016-10-04 |
| 9454366 | Copying character data having a termination character from one memory location to another | Jonathan D. Bradbury, Timothy J. Slegel | 2016-09-27 |
| 9454483 | Salvaging lock elision transactions with instructions to change execution type | Harold W. Cain, III, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum | 2016-09-27 |
| 9454367 | Finding the length of a set of character data having a termination character | Jonathan D. Bradbury, Timothy J. Slegel | 2016-09-27 |
| 9454374 | Transforming non-contiguous instruction specifiers to contiguous instruction specifiers | — | 2016-09-27 |
| 9448939 | Collecting memory operand access characteristics during transactional execution | Dan F. Greiner, Valentina Salapura, Timothy J. Slegel | 2016-09-20 |
| 9448836 | Alerting hardware transactions that are about to run out of space | Fadi Y. Busaba, Harold W. Cain, III, Maged M. Michael, Valentina Salapura | 2016-09-20 |
| 9442728 | Run-time instrumentation indirect sampling by instruction operation code | Jonathan D. Bradbury, Charles W. Gainey, Jr., Eric M. Schwarz | 2016-09-13 |
| 9442776 | Salvaging hardware transactions with instructions to transfer transaction execution control | Harold W. Cain, III, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum | 2016-09-13 |