Issued Patents 2016
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9524261 | Credit lookahead mechanism | Harshavardhan Kaushikkar, Benjamin K. Dodge | 2016-12-20 |
| 9495318 | Synchronizing transactions for a single master over multiple busses | Deniz Balkan, Jim Jian Lin, Timothy R. Paaske, Ben D. Jarrett | 2016-11-15 |
| 9367474 | Translating cache hints | Shailendra Desai, Deniz Balkan, James Wang | 2016-06-14 |
| 9317102 | Power control for cache structures | Muditha Kanchana, Harshavardhan Kaushikkar, Erik P. Machnicki, Seye Ewedemi | 2016-04-19 |
| 9310783 | Dynamic clock and power gating with decentralized wake-ups | Erik P. Machnicki, Munetoshi Fukami, Shane J. Keil | 2016-04-12 |
| 9280503 | Round robin arbiter handling slow transaction sources and preventing block | Deniz Balkan, Munetoshi Fukami | 2016-03-08 |
| 9280471 | Mechanism for sharing private caches in a SoC | Manu Gulati, Harshavardhan Kaushikkar, Wei-Han Lien, Gerard R. Williams, III, Sukalpa Biswas +2 more | 2016-03-08 |
| 9270610 | Apparatus and method for controlling transaction flow in integrated circuits | Deniz Balkan, Kevin C. Wong, Munetoshi Fukami | 2016-02-23 |
| 9229894 | Protocol conversion involving multiple virtual channels | Deniz Balkan, Joseph P. Bratt, Kevin C. Wong, Manu Gulati, Rohit Gupta | 2016-01-05 |
| 9229896 | Systems and methods for maintaining an order of read and write transactions in a computing system | Deniz Balkan | 2016-01-05 |