Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9495318 | Synchronizing transactions for a single master over multiple busses | Gurjeet S. Saund, Jim Jian Lin, Timothy R. Paaske, Ben D. Jarrett | 2016-11-15 |
| 9367474 | Translating cache hints | Shailendra Desai, Gurjeet S. Saund, James Wang | 2016-06-14 |
| 9280503 | Round robin arbiter handling slow transaction sources and preventing block | Gurjeet S. Saund, Munetoshi Fukami | 2016-03-08 |
| 9270610 | Apparatus and method for controlling transaction flow in integrated circuits | Gurjeet S. Saund, Kevin C. Wong, Munetoshi Fukami | 2016-02-23 |
| 9229894 | Protocol conversion involving multiple virtual channels | Gurjeet S. Saund, Joseph P. Bratt, Kevin C. Wong, Manu Gulati, Rohit Gupta | 2016-01-05 |
| 9229896 | Systems and methods for maintaining an order of read and write transactions in a computing system | Gurjeet S. Saund | 2016-01-05 |