| 9530492 |
NAND array hiarchical BL structures for multiple-WL and All-BL simultaneous erase, erase-verify, program, program-verify, and read operations |
— |
2016-12-27 |
| 9524773 |
Multi-task concurrent/pipeline NAND operations on all planes |
— |
2016-12-20 |
| 9490427 |
Resistive random access memory cell structure |
Pantas Sutardja, Albert Wu, Winston Lee, Runzi Chang |
2016-11-08 |
| 9443579 |
VSL-based VT-compensation and analog program scheme for NAND array without CSL |
— |
2016-09-13 |
| 9443578 |
NAND array architecture for multiple simultaneous program and read |
— |
2016-09-13 |
| 9437306 |
NAND array architecture for multiple simutaneous program and read |
— |
2016-09-06 |
| 9424911 |
Method and apparatus for screening memory cells for disturb failures |
Winston Lee, Moon-Hae Son |
2016-08-23 |
| 9324417 |
Systems and methods for avoiding read disturbance in a static random-access memory (SRAM) |
Winston Lee |
2016-04-26 |
| 9293205 |
Multi-task concurrent/pipeline NAND operations on all planes |
— |
2016-03-22 |
| 9275731 |
Systems and methods for increasing the read sensitivity of a resistive random access memory (RRAM) |
Pantas Sutardja, Albert Wu, Runzi Chang, Winston Lee |
2016-03-01 |
| 9263137 |
NAND array architecture for multiple simutaneous program and read |
— |
2016-02-16 |
| 9245961 |
Reducing source contact to gate spacing to decrease transistor pitch |
Albert Wu, Pantas Sutardja, Winston Lee, Chien-Chuan Wei, Runzi Chang |
2016-01-26 |
| 9230677 |
NAND array hiarchical BL structures for multiple-WL and all-BL simultaneous erase, erase-verify, program, program-verify, and read operations |
— |
2016-01-05 |
