Issued Patents 2011
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8076779 | Reduction of macro level stresses in copper/low-K wafers | Sey-Shing Sun, Jayanthi Pallinti, Dilip Vijay, Hemanshu Bhatt, Hong Ying +1 more | 2011-12-13 |
| 8043968 | Dielectric barrier layer for increasing electromigration lifetimes in copper interconnect structures | Hao Cui, Wilbur G. Catabay | 2011-10-25 |
| 7981757 | Semiconductor component and method of manufacture | Sallie Hose, Sudhama C. Shastri | 2011-07-19 |
| 7928521 | Non-tensioned carbon nanotube switch design and process for making same | Thomas Rueckes, Claude L. Bertin | 2011-04-19 |
| 7915122 | Self-aligned cell integration scheme | Richard J. Carter, Hemanshu Bhatt, Shiqun Gu, James R. B. Elmer, Sey-Shing Sun +2 more | 2011-03-29 |
| 7897462 | Method of manufacturing semiconductor component with gate and shield electrodes in trenches | Duane B. Barber, Brian Pratt | 2011-03-01 |
| 7884430 | Isolated metal plug process for use in fabricating carbon nanotube memory cells | Richard J. Carter, Verne Hornback, Thomas Rueckes, Claude L. Bertin | 2011-02-08 |