Issued Patents 2011
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8085267 | Stochastic addition of rays in a ray tracing image processing system | Jeffrey Douglas Brown, Eric O. Mejdrich | 2011-12-27 |
| 8040799 | Network on chip with minimum guaranteed bandwidth for virtual communications channels | Kenneth M. Valk | 2011-10-18 |
| 8022950 | Stochastic culling of rays with increased depth of recursion | Jeffrey Douglas Brown, Eric O. Mejdrich | 2011-09-20 |
| 8018466 | Graphics rendering on a network on chip | Jamie R. Kuesel, Eric O. Mejdrich, Paul E. Schardt, Robert A. Shearer | 2011-09-13 |
| 8020168 | Dynamic virtual software pipelining on a network on chip | Eric O. Mejdrich, Paul E. Schardt, Robert A. Shearer | 2011-09-13 |
| 8010750 | Network on chip that maintains cache coherency with invalidate commands | Miguel Comparan, Jamie R. Kuesel, Eric O. Mejdrich | 2011-08-30 |
| 7996621 | Data cache invalidate with data dependent expiration using a step value | Jeffrey Douglas Brown, Eric O. Mejdrich, Kenneth M. Valk | 2011-08-09 |
| 7958340 | Monitoring software pipeline performance on a network on chip | Eric O. Mejdrich, Paul E. Schardt, Robert A. Shearer | 2011-06-07 |
| 7940265 | Multiple spacial indexes for dynamic scene management in graphics rendering | Jeffrey Douglas Brown, Jamie R. Kuesel, Eric O. Mejdrich, Robert A. Shearer | 2011-05-10 |
| 7917703 | Network on chip that maintains cache coherency with invalidate commands | Miguel Comparan, Jamie R. Kuesel, Eric O. Mejdrich, Alfred T. Watson, III | 2011-03-29 |
| 7913010 | Network on chip with a low latency, high bandwidth application messaging interconnect | Jon K. Kriegel, Eric O. Mejdrich | 2011-03-22 |
| 7873701 | Network on chip with partitions | Eric O. Mejdrich, Paul E. Schardt, Robert A. Shearer | 2011-01-18 |