Issued Patents 2011
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8078850 | Branch prediction technique using instruction for resetting result table pointer | Jamie R. Kuesel, Mark G. Kupferschmidt, Eric O. Mejdrich | 2011-12-13 |
| 8024616 | Pseudo random process state register for fast random process test generation | Eric O. Mejdrich, Robert A. Shearer, Matthew R. Tubbs | 2011-09-20 |
| 8018466 | Graphics rendering on a network on chip | Russell D. Hoover, Jamie R. Kuesel, Eric O. Mejdrich, Robert A. Shearer | 2011-09-13 |
| 8020168 | Dynamic virtual software pipelining on a network on chip | Russell D. Hoover, Eric O. Mejdrich, Robert A. Shearer | 2011-09-13 |
| 7992043 | Software debugger for packets in a network on a chip | Eric O. Mejdrich, Robert A. Shearer, Matthew R. Tubbs | 2011-08-02 |
| 7991978 | Network on chip with low latency, high bandwidth application messaging interconnects that abstract hardware inter-thread data communications into an architected state of a processor | Jamie R. Kuesel, Mark G. Kupferschmidt, Eric O. Mejdrich | 2011-08-02 |
| 7973804 | Image processing with highly threaded texture fragment generation | Eric O. Mejdrich, Robert A. Shearer | 2011-07-05 |
| 7958340 | Monitoring software pipeline performance on a network on chip | Russell D. Hoover, Eric O. Mejdrich, Robert A. Shearer | 2011-06-07 |
| 7937589 | Computer grid access management system | William A. Oswald, Janice Lynn Pascoe, Lance G. Thompson | 2011-05-03 |
| 7873701 | Network on chip with partitions | Russell D. Hoover, Eric O. Mejdrich, Robert A. Shearer | 2011-01-18 |