Issued Patents 2011
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8085267 | Stochastic addition of rays in a ray tracing image processing system | Jeffrey Douglas Brown, Russell D. Hoover | 2011-12-27 |
| 8082420 | Method and apparatus for executing instructions | Miguel Comparan, Brent F. Hilgart, Brian Lee Koehler, Adam J. Muff, Alfred T. Watson, III | 2011-12-20 |
| 8078850 | Branch prediction technique using instruction for resetting result table pointer | Jamie R. Kuesel, Mark G. Kupferschmidt, Paul E. Schardt | 2011-12-13 |
| 8024616 | Pseudo random process state register for fast random process test generation | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2011-09-20 |
| 8022950 | Stochastic culling of rays with increased depth of recursion | Jeffrey Douglas Brown, Russell D. Hoover | 2011-09-20 |
| 8018466 | Graphics rendering on a network on chip | Russell D. Hoover, Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer | 2011-09-13 |
| 8020168 | Dynamic virtual software pipelining on a network on chip | Russell D. Hoover, Paul E. Schardt, Robert A. Shearer | 2011-09-13 |
| 8010750 | Network on chip that maintains cache coherency with invalidate commands | Miguel Comparan, Russell D. Hoover, Jamie R. Kuesel | 2011-08-30 |
| 7996621 | Data cache invalidate with data dependent expiration using a step value | Jeffrey Douglas Brown, Russell D. Hoover, Kenneth M. Valk | 2011-08-09 |
| 7991978 | Network on chip with low latency, high bandwidth application messaging interconnects that abstract hardware inter-thread data communications into an architected state of a processor | Jamie R. Kuesel, Mark G. Kupferschmidt, Paul E. Schardt | 2011-08-02 |
| 7992043 | Software debugger for packets in a network on a chip | Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs | 2011-08-02 |
| 7973804 | Image processing with highly threaded texture fragment generation | Paul E. Schardt, Robert A. Shearer | 2011-07-05 |
| 7958340 | Monitoring software pipeline performance on a network on chip | Russell D. Hoover, Paul E. Schardt, Robert A. Shearer | 2011-06-07 |
| 7945764 | Processing unit incorporating multirate execution unit | Adam J. Muff, Matthew R. Tubbs | 2011-05-17 |
| 7941644 | Simultaneous multi-thread instructions issue to execution units while substitute injecting sequence of instructions for long latency sequencer instruction via multiplexer | Adam J. Muff, Matthew R. Tubbs | 2011-05-10 |
| 7940265 | Multiple spacial indexes for dynamic scene management in graphics rendering | Jeffrey Douglas Brown, Russell D. Hoover, Jamie R. Kuesel, Robert A. Shearer | 2011-05-10 |
| 7926009 | Dual independent and shared resource vector execution units with shared register file | Adam J. Muff, Matthew R. Tubbs | 2011-04-12 |
| 7917703 | Network on chip that maintains cache coherency with invalidate commands | Miguel Comparan, Russell D. Hoover, Jamie R. Kuesel, Alfred T. Watson, III | 2011-03-29 |
| 7913010 | Network on chip with a low latency, high bandwidth application messaging interconnect | Russell D. Hoover, Jon K. Kriegel | 2011-03-22 |
| 7904700 | Processing unit incorporating special purpose register for use with instruction-based persistent vector multiplexer control | Adam J. Muff, Robert A. Shearer, Matthew R. Tubbs | 2011-03-08 |
| 7904699 | Processing unit incorporating instruction-based persistent vector multiplexer control | Adam J. Muff, Robert A. Shearer, Matthew R. Tubbs | 2011-03-08 |
| 7890699 | Processing unit incorporating L1 cache bypass | Miguel Comparan, Adam J. Muff | 2011-02-15 |
| 7884819 | Pixel color accumulation in a ray tracing image processing system | Jamie R. Kuesel, Robert A. Shearer | 2011-02-08 |
| 7873701 | Network on chip with partitions | Russell D. Hoover, Paul E. Schardt, Robert A. Shearer | 2011-01-18 |
| 7868894 | Operand multiplexor control modifier instruction in a fine grain multithreaded vector microprocessor | Adam J. Muff, Matthew R. Tubbs | 2011-01-11 |