Issued Patents 2011
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8086783 | High availability memory system | James A. O'Connor, Luis A. Lastras-Montano, Warren E. Maule | 2011-12-27 |
| 8086936 | Performing error correction at a memory device level that is transparent to a memory channel | Warren E. Maule | 2011-12-27 |
| 8082482 | System for performing error correction operations in a memory hub device of a memory module | Warren E. Maule | 2011-12-20 |
| 8082475 | Enhanced microprocessor interconnect with bit shadowing | Frank D. Ferraiolo, Daniel M. Dreps, Robert J. Reese | 2011-12-20 |
| 8082474 | Bit shadowing in a memory system | Frank D. Ferraiolo, Daniel M. Dreps, Robert J. Reese | 2011-12-20 |
| 8041989 | System and method for providing a high fault tolerant memory system | Luis A. Lastras-Montano, James A. O'Connor, Luiz C. Alves, William J. Clarke, Timothy J. Dell +1 more | 2011-10-18 |
| 8041990 | System and method for error correction and detection in a memory system | James A. O'Connor, Luis A. Lastras-Montano, Luis C. Alves, William J. Clarke, Timothy J. Dell +1 more | 2011-10-18 |
| 8019919 | Method for enhancing the memory bandwidth available through a memory module | Warren E. Maule | 2011-09-13 |
| 7984222 | Systems for providing performance monitoring in a memory system | Carl E. Love, Dustin J. VanStee | 2011-07-19 |
| 7979759 | Test and bring-up of an enhanced cascade interconnect memory system | Michael Joseph Carnevale, Elianne A. Bravo, Gary A. Van Huben, Donald J. Ziebarth | 2011-07-12 |
| 7979616 | System and method for providing a configurable command sequence for a memory interface device | Elianne A. Bravo, Dustin J. VanStee | 2011-07-12 |
| 7948817 | Advanced memory device having reduced power and improved performance | Paul W. Coteus, Daniel M. Dreps, Hillery C. Hunter, Charles A. Kilmer, Kyu-hyoun Kim +1 more | 2011-05-24 |
| 7930470 | System to enable a memory hub device to manage thermal conditions at a memory device level transparent to a memory controller | Mark A. Brittain, Warren E. Maule | 2011-04-19 |
| 7930469 | System to provide memory system power reduction without reducing overall memory system performance | Mark A. Brittain, Warren E. Maule | 2011-04-19 |
| 7925826 | System to increase the overall bandwidth of a memory channel by allowing the memory channel to operate at a frequency independent from a memory device frequency | Mark A. Brittain, Warren E. Maule | 2011-04-12 |
| 7925825 | System to support a full asynchronous interface within a memory hub device | Mark A. Brittain, Warren E. Maule | 2011-04-12 |
| 7925824 | System to reduce latency by running a memory channel frequency fully asynchronous from a memory device frequency | Mark A. Brittain, Warren E. Maule | 2011-04-12 |
| 7899983 | Buffered memory module supporting double the memory device data width in the same physical space as a conventional memory module | Warren E. Maule | 2011-03-01 |
| 7895374 | Dynamic segment sparing and repair in a memory system | Frank D. Ferraiolo, Ravi Kumar Arimilli, Daniel M. Dreps, Robert J. Reese | 2011-02-22 |
| 7890676 | Memory systems for automated computing machinery | Daniel M. Dreps, Warren E. Maule, Robert B. Tremaine | 2011-02-15 |
| 7863091 | Planar array contact memory cards | Paul W. Coteus, Shawn A. Hall, Gareth G. Hougham, Dale J. Pearson | 2011-01-04 |
| 7865674 | System for enhancing the memory bandwidth available through a memory module | Warren E. Maule | 2011-01-04 |
| 7863089 | Planar array contact memory cards | Paul W. Coteus, Shawn A. Hall, Gareth G. Hougham, Dale J. Pearson | 2011-01-04 |