Issued Patents 2011
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8055925 | Structure and method to optimize computational efficiency in low-power environments | Clarence R. Ogilvie, Sebastian T. Ventrone, Keith R. Williams, Charles S. Woodruff | 2011-11-08 |
| 8020137 | Structure for an on-demand power supply current modification system for an integrated circuit | Corey K. Barrows, Stephen G. Shuma, Peter A. Twombly, Paul S. Zuchowski | 2011-09-13 |
| 8010813 | Structure for system for extending the useful life of another system | Stephen G. Shuma, Oscar C. Strohacker, Mark S. Styduhar, Peter A. Twombly, Andrew S. Wienick +1 more | 2011-08-30 |
| 7949978 | Structure for system architectures for and methods of scheduling on-chip and across-chip noise events in an integrated circuit | Corey K. Barrows, Stephen G. Shuma, Peter A. Twombly, Paul S. Zuchowski | 2011-05-24 |
| 7941772 | Dynamic critical path detector for digital logic circuit paths | Serafino Bueti, Todd E. Leonard, Gregory J. Mann, Peter A. Sandon, Peter A. Twombly +1 more | 2011-05-10 |
| 7937560 | Processor pipeline architecture logic state retention systems and methods | Kerry Bernstein, Clarence R. Ogilvie, Christopher B. Reynolds, Sebastian T. Ventrone, Keith R. Williams | 2011-05-03 |
| 7913193 | Determining relative amount of usage of data retaining device based on potential of charge storing device | Kerry Bernstein, Clarence R. Ogilvie, Sebastian T. Ventrone, Keith R. Williams | 2011-03-22 |
| 7903493 | Design structure for estimating and/or predicting power cycle length, method of estimating and/or predicting power cycle length and circuit thereof | Clarence R. Ogilvie, Nitin Sharma, Sebastian T. Ventrone, Charles S. Woodruff | 2011-03-08 |
| 7895459 | Structure for a system and method of predicting power events in an intermittent power environment and dispatching computational operations of an integrated circuit accordingly | Clarence R. Ogilvie, Sebastian T. Ventrone, Keith R. Williams | 2011-02-22 |
| 7882334 | Processor pipeline architecture logic state retention systems and methods | Kerry Bernstein, Clarence R. Ogilvie, Christopher B. Reynolds, Sebastian T. Ventrone, Keith R. Williams | 2011-02-01 |
| 7869298 | Determining relative amount of usage of data retaining device based on potential of charge storing device | Kerry Bernstein, Clarence R. Ogilvie, Sebastian T. Ventrone, Keith R. Williams | 2011-01-11 |
| 7865789 | System and method for system-on-chip interconnect verification | Serafino Bueti, Adam J. Courchesne, Gregory J. Mann, Jason M. Norman, Stanley B. Stanski +1 more | 2011-01-04 |