Issued Patents 2011
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8060845 | Minimizing impact of design changes for integrated circuit designs | Robert D. Herzl, Robert S. Horton, Kenneth A. Lauricella, David W. Milton, Paul M. Schanely +3 more | 2011-11-15 |
| 8055925 | Structure and method to optimize computational efficiency in low-power environments | Kenneth J. Goodnow, Sebastian T. Ventrone, Keith R. Williams, Charles S. Woodruff | 2011-11-08 |
| 7937560 | Processor pipeline architecture logic state retention systems and methods | Kerry Bernstein, Kenneth J. Goodnow, Christopher B. Reynolds, Sebastian T. Ventrone, Keith R. Williams | 2011-05-03 |
| 7913193 | Determining relative amount of usage of data retaining device based on potential of charge storing device | Kerry Bernstein, Kenneth J. Goodnow, Sebastian T. Ventrone, Keith R. Williams | 2011-03-22 |
| 7903493 | Design structure for estimating and/or predicting power cycle length, method of estimating and/or predicting power cycle length and circuit thereof | Kenneth J. Goodnow, Nitin Sharma, Sebastian T. Ventrone, Charles S. Woodruff | 2011-03-08 |
| 7895459 | Structure for a system and method of predicting power events in an intermittent power environment and dispatching computational operations of an integrated circuit accordingly | Kenneth J. Goodnow, Sebastian T. Ventrone, Keith R. Williams | 2011-02-22 |
| 7882334 | Processor pipeline architecture logic state retention systems and methods | Kerry Bernstein, Kenneth J. Goodnow, Christopher B. Reynolds, Sebastian T. Ventrone, Keith R. Williams | 2011-02-01 |
| 7869298 | Determining relative amount of usage of data retaining device based on potential of charge storing device | Kerry Bernstein, Kenneth J. Goodnow, Sebastian T. Ventrone, Keith R. Williams | 2011-01-11 |