Issued Patents 2011
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8024513 | Method and system for implementing dynamic refresh protocols for DRAM based cache | John E. Barth, Jr., Philip G. Emma, Erik L. Hedberg, Hillery C. Hunter, Vijayalakshmi Srinivasan +1 more | 2011-09-20 |
| 8019970 | Three-dimensional networking design structure | Kerry Bernstein, Timothy J. Dalton, Marc R. Faucher | 2011-09-13 |
| 7971122 | Method of computing partial CRCS | Richard E. Anderson, Christos J. Georgiou | 2011-06-28 |
| 7962695 | Method and system for integrating SRAM and DRAM architecture in set associative cache | Marc R. Faucher, Hillery C. Hunter, William Robert Reohr, Vijayalakshmi Srinivasan, Arnold S. Tran | 2011-06-14 |
| 7949853 | Two dimensional addressing of a matrix-vector register array | R. Michael P. West | 2011-05-24 |
| 7941772 | Dynamic critical path detector for digital logic circuit paths | Serafino Bueti, Kenneth J. Goodnow, Todd E. Leonard, Gregory J. Mann, Peter A. Twombly +1 more | 2011-05-10 |
| 7908460 | Method and apparatus for obtaining a scalar value directly from a vector register | Yu-Chung C. Liao, Howard Cheng, Timothy J. Van Hook | 2011-03-15 |
| 7882302 | Method and system for implementing prioritized refresh of DRAM based cache | Marc R. Faucher, Arnold S. Tran | 2011-02-01 |
| 7865694 | Three-dimensional networking structure | Kerry Bernstein, Timothy J. Dalton, Marc R. Faucher | 2011-01-04 |
| 7865749 | Method and apparatus for dynamic system-level frequency scaling | Cedric Lichtenau, Martin Recktenwald, Thomas Pflueger, Rolf Hilgendorf | 2011-01-04 |