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Vinod Kariat

CS Cadence Design Systems: 3 patents #7 of 259Top 3%
📍 Sunnyvale, CA: #199 of 1,815 inventorsTop 15%
🗺 California: #4,350 of 41,698 inventorsTop 15%
Overall (2011): #32,947 of 364,097Top 10%
3
Patents 2011

Issued Patents 2011

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
7900166 Method to produce an electrical model of an integrated circuit substrate and related system and article of manufacture Xiaopeng Dong, David C. Noice 2011-03-01
7882471 Timing and signal integrity analysis of integrated circuits with semiconductor process variations Joel R. Phillips, Igor Keller 2011-02-01
7877713 Method and apparatus for substrate noise analysis using substrate tile model and tile grid Xiaopeng Dong, David C. Noice 2011-01-25