DN

David C. Noice

CS Cadence Design Systems: 3 patents #7 of 259Top 3%
📍 Palo Alto, CA: #218 of 1,511 inventorsTop 15%
🗺 California: #4,350 of 41,698 inventorsTop 15%
Overall (2011): #50,892 of 364,097Top 15%
3
Patents 2011

Issued Patents 2011

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
7900166 Method to produce an electrical model of an integrated circuit substrate and related system and article of manufacture Vinod Kariat, Xiaopeng Dong 2011-03-01
7877713 Method and apparatus for substrate noise analysis using substrate tile model and tile grid Vinod Kariat, Xiaopeng Dong 2011-01-25
7865858 Method, system, and article of manufacture for implementing metal-fill with power or ground connection Thanh Vinh Vuong, William Kao 2011-01-04