FT

Feroze P. Taraporevala

SY Synopsys: 1 patents #17 of 58Top 30%
📍 San Jose, CA: #892 of 2,758 inventorsTop 35%
🗺 California: #7,981 of 26,868 inventorsTop 30%
Overall (2005): #203,683 of 245,428Top 85%
1
Patents 2005

Issued Patents 2005

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6961916 Placement method for integrated circuit design using topo-clustering Majid Sarrafzadeh, Lawrence Pileggi, Sharad Malik, Abhijeet Chakraborty, Gary K. Yeap +4 more 2005-11-01