LC

Laurence H. Cooke

CS Cadence Design Systems: 3 patents #10 of 77Top 15%
OT On-Chip Technologies: 1 patents #1 of 3Top 35%
📍 Los Gatos, CA: #24 of 354 inventorsTop 7%
🗺 California: #1,188 of 26,868 inventorsTop 5%
Overall (2005): #11,107 of 245,428Top 5%
4
Patents 2005

Issued Patents 2005

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
6968514 Block based design methodology with programmable components Kumar Venkatramani, Jin-Sheng Shyr 2005-11-22
6964001 On-chip service processor Bulent Dervisoglu, Vacit Arat 2005-11-08
6901562 Adaptable circuit blocks for use in multi-block chip design Kumar Venkatramani 2005-05-31
6886121 Hierarchical test circuit structure for chips with multiple circuit blocks Bulent Dervisoglu 2005-04-26