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Jin-Sheng Shyr

CS Cadence Design Systems: 1 patents #18 of 77Top 25%
IN Intel: 1 patents #771 of 2,371Top 35%
📍 Cupertino, CA: #121 of 659 inventorsTop 20%
🗺 California: #3,616 of 26,868 inventorsTop 15%
Overall (2005): #50,596 of 245,428Top 25%
2
Patents 2005

Issued Patents 2005

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6968514 Block based design methodology with programmable components Laurence H. Cooke, Kumar Venkatramani 2005-11-22
6871341 Adaptive scheduling of function cells in dynamic reconfigurable logic 2005-03-22