AG

Aarti Gupta

NE Nec: 2 patents #66 of 878Top 8%
📍 San Jose, CA: #418 of 2,758 inventorsTop 20%
🗺 California: #3,616 of 26,868 inventorsTop 15%
Overall (2005): #64,611 of 245,428Top 30%
2
Patents 2005

Issued Patents 2005

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6975976 Property specific testbench generation framework for circuit design validation by guided simulation Albert E. Casavant, Pranav Ashar 2005-12-13
6874135 Method for design validation using retiming Pranav Ashar, Sharad Malik 2005-03-29