Issued Patents 2005
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6925537 | Multiprocessor cache coherence system and method in which processor nodes and input/output nodes are equal participants | Luiz Andre Barroso, Kourosh Gharachorloo, Mosur K. Ravishankar, Robert Stets | 2005-08-02 |
| 6912624 | Method and system for exclusive two-level caching in a chip-multiprocessor | Luiz Andre Barroso, Kourosh Gharachorloo | 2005-06-28 |