Issued Patents 2005
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6925537 | Multiprocessor cache coherence system and method in which processor nodes and input/output nodes are equal participants | Luiz Andre Barroso, Andreas Nowatzyk, Mosur K. Ravishankar, Robert Stets | 2005-08-02 |
| 6918015 | Scalable directory based cache coherence protocol | Richard E. Kessler, David Asher | 2005-07-12 |
| 6912624 | Method and system for exclusive two-level caching in a chip-multiprocessor | Luiz Andre Barroso, Andreas Nowatzyk | 2005-06-28 |