Issued Patents 2005
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6980453 | Flash memory with RDRAM interface | Kevin C. Widmer | 2005-12-27 |
| 6977841 | Preconditioning of defective and redundant columns in a memory device | — | 2005-12-20 |
| 6975542 | NAND flash memory with improved read and verification threshold uniformity | — | 2005-12-13 |
| 6975538 | Memory block erasing in a flash memory device | Ebrahim Abedifard | 2005-12-13 |
| 6967826 | Electrostatic discharge protection with input impedance | — | 2005-11-22 |
| 6952045 | Memory device power distribution in electronic systems | — | 2005-10-04 |
| 6949813 | Lead-over-chip lead frames | — | 2005-09-27 |
| 6941411 | Non-contiguous address erasable blocks and command in flash memory | — | 2005-09-06 |
| 6938117 | Tri-stating output buffer during initialization of synchronous memory | — | 2005-08-30 |
| 6934188 | Non-volatile memory erase circuitry | — | 2005-08-23 |
| 6930916 | High speed low voltage driver | Ebrahim Abedifard | 2005-08-16 |
| 6922758 | Synchronous flash memory with concurrent write and read operation | — | 2005-07-26 |
| 6920522 | Synchronous flash memory with accessible page during write | — | 2005-07-19 |
| 6906955 | Flash memory with RDRAM interface | Kevin C. Widmer | 2005-06-14 |
| 6901008 | Flash memory with RDRAM interface | Kevin C. Widmer | 2005-05-31 |
| 6892270 | Synchronous flash memory emulating the pin configuration of SDRAM | — | 2005-05-10 |
| 6891758 | Position based erase verification levels in a flash memory device | — | 2005-05-10 |
| 6886071 | Status register to improve initialization of a synchronous memory | — | 2005-04-26 |
| 6883044 | Synchronous flash memory with simultaneous access to one or more banks | — | 2005-04-19 |
| 6877100 | Adjustable timing circuit of an integrated circuit by selecting and moving clock edges based on a signal propagation time stored in a programmable non-volatile fuse circuit | Dean Nobunaga | 2005-04-05 |
| 6877080 | Flash with consistent latency for read operations | — | 2005-04-05 |
| 6876583 | Non-volatile memory erase circuitry | — | 2005-04-05 |
| 6873507 | Electrostatic discharge protection with input impedance | — | 2005-03-29 |
| 6873564 | Zero latency-zero bus turnaround synchronous flash memory | — | 2005-03-29 |
| 6870774 | Flash memory architecture for optimizing performance of memory having multi-level memory cells | Kevin C. Widmer, Cliff Zitlaw | 2005-03-22 |