Issued Patents 2005
Showing 1–25 of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6977854 | Flash array implementation with local and global bit lines | — | 2005-12-20 |
| 6977853 | Flash array implementation with local and global bit lines | — | 2005-12-20 |
| 6973005 | Flash array implementation with local and global bit lines | — | 2005-12-06 |
| 6972985 | Memory element having islands | Darrell Rinerson, Philip Swab, Steve Kuo-Ren Hsia, John Sanchez, Steven W. Longcor | 2005-12-06 |
| 6970375 | Providing a reference voltage to a cross point memory array | Darrell Rinerson, Steven W. Longcor, Edmond R. Ward, Wayne Kinney, Steve Kuo-Ren Hsia | 2005-11-29 |
| 6961805 | Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous reading writing or erasure | Vinod Lakhani, Mathew L. Adsitt | 2005-11-01 |
| 6954400 | Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure | Vinod Lakhani, Mathew L. Adsitt | 2005-10-11 |
| 6948041 | Permanent memory block protection in a flash memory device | See Kit Leong | 2005-09-20 |
| 6944839 | Checking layout accuracy in integrated circuit designs | Adriana Ababei | 2005-09-13 |
| 6944812 | Mode entry circuit and method | — | 2005-09-13 |
| 6940780 | Flash array implementation with local and global bit lines | — | 2005-09-06 |
| 6940744 | Adaptive programming technique for a re-writable conductive memory device | Darrell Rinerson | 2005-09-06 |
| 6937519 | Flash memory with fast boot block access | Allahyar Vahidimowlavi | 2005-08-30 |
| 6934207 | Flash array implementation with local and global bit lines | — | 2005-08-23 |
| 6914813 | Segmented non-volatile memory array with multiple sources having improved source line decode circuitry | Vinod Lakhani | 2005-07-05 |
| 6909636 | Flash array implementation with local and global bit lines | — | 2005-06-21 |
| 6909632 | Multiple modes of operation in a cross point array | Darrell Rinerson, Steven W. Longcor, Edmond R. Ward, Wayne Kinney, Steve Kuo-Ren Hsia | 2005-06-21 |
| 6906939 | Re-writable memory with multiple memory layers | Darrell Rinerson, Steven W. Longcor, Wayne Kinney, Edmond R. Ward | 2005-06-14 |
| 6900625 | Voltage converter system and method having a stable output voltage | Dumitru Cioaca | 2005-05-31 |
| 6879340 | CMOS imager with integrated non-volatile memory | — | 2005-04-12 |
| 6870755 | Re-writable memory with non-linear memory element | Darrell Rinerson, Steven W. Longcor, Wayne Kinney, Edmond R. Ward, Steve Kuo-Ren Hsia | 2005-03-22 |
| 6862243 | Flash array implementation with local and global bit lines | — | 2005-03-01 |
| 6859382 | Memory array of a non-volatile ram | Darrell Rinerson | 2005-02-22 |
| 6856536 | Non-volatile memory with a single transistor and resistive memory element | Darrell Rinerson | 2005-02-15 |
| 6856571 | Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure | Vinod Lakhani, Mathew L. Adsitt | 2005-02-15 |