Issued Patents 2005
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6954381 | EEPROM with split gate source side injection with sidewall spacers | Daniel C. Guterman, Gheorghe Samachisa, Eliyahou Harari | 2005-10-11 |
| 6953970 | Scalable self-aligned dual floating gate memory cell array and methods of forming the array | Jack Yuan, Eliyahou Harari, George Samachisa | 2005-10-11 |
| 6898121 | Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND | Henry Chien | 2005-05-24 |
| 6894926 | Multi-state memory | Daniel C. Guterman | 2005-05-17 |
| 6894930 | Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND | Henry Chien | 2005-05-17 |
| 6888758 | Programming non-volatile memory | Gertjan Hemink | 2005-05-03 |
| 6870768 | Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells | Raul-Adrian Cernea, Khandker N. Quader, Yan Li, Jian Chen | 2005-03-22 |
| 6861700 | Eeprom with split gate source side injection | Daniel C. Guterman, Gheorghe Samachisa, Eliyahou Harari | 2005-03-01 |
| 6862218 | Multi-state memory | Daniel C. Guterman | 2005-03-01 |
| 6856546 | Multi-state memory | Daniel C. Guterman | 2005-02-15 |