Issued Patents 2005
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6953970 | Scalable self-aligned dual floating gate memory cell array and methods of forming the array | Eliyahou Harari, Yupin Fong, George Samachisa | 2005-10-11 |
| 6953964 | Non-volatile memory cell array having discontinuous source and drain diffusions contacted by continuous bit line conductors and methods of forming | Jacob D. Haskell | 2005-10-11 |
| 6936887 | Non-volatile memory cells utilizing substrate trenches | Eliyahou Harari, George Samachisa, Henry Chien | 2005-08-30 |
| 6925007 | Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements | Eliyahou Harari, George Samachisa, Daniel C. Guterman | 2005-08-02 |
| 6908817 | Flash memory array with increased coupling between floating and control gates | — | 2005-06-21 |
| 6897522 | Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements | Eliyahou Harari, George Samachisa, Daniel C. Guterman | 2005-05-24 |
| 6894343 | Floating gate memory cells utilizing substrate trenches to scale down their size | Eliyahou Harari, George Samachisa | 2005-05-17 |