Issued Patents 2005
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6957373 | Address generator for generating addresses for testing a circuit | Wolfgang Ernst, Jens Luepke, Peter Poechmüller, Gunnar Krause, Jochen Mueller +1 more | 2005-10-18 |
| 6954871 | Method of matching different signal propagation times between a controller and at least two processing units, and a computer system | — | 2005-10-11 |
| 6910161 | Device and method for reducing the number of addresses of faulty memory cells | Peter Weitz | 2005-06-21 |
| 6871306 | Method and device for reading and for checking the time position of data response signals read out from a memory module to be tested | Wolfgang Ernst, Gunnar Krause, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2005-03-22 |
| 6865707 | Test data generator | Wolfgang Ernst, Gunnar Krause, Jens Luepke, Jochen Mueller, Peter Poechmueller +1 more | 2005-03-08 |
| 6862702 | Address counter for addressing synchronous high-frequency digital circuits, in particular memory devices | Wolfgang Ernst, Gunnar Krause, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2005-03-01 |
| 6853206 | Method and probe card configuration for testing a plurality of integrated circuits in parallel | Michael Hübner, Gunnar Krause, Jochen Müller, Peter P{hacek over (o)}chmüller, Jürgen Weidenhöfer | 2005-02-08 |
| 6839397 | Circuit configuration for generating control signals for testing high-frequency synchronous digital circuits | Wolfgang Ernst, Gunnar Krause, Jens Lüpke, Jochen Müller, Peter Pöchmüller +1 more | 2005-01-04 |