Issued Patents 2005
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6981083 | Processor virtualization mechanism via an enhanced restoration of hard architected states | Ravi Kumar Arimilli, Robert Alan Cargnoni, William J. Starke | 2005-12-27 |
| 6976148 | Acceleration of input/output (I/O) communication through improved address translation | Ravi Kumar Arimilli, Robert Alan Cargnoni, William J. Starke | 2005-12-13 |
| 6970976 | Layered local cache with lower level cache optimizing allocation mechanism | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson | 2005-11-29 |
| 6963967 | System and method for enabling weak consistent storage advantage to a firmly consistent storage architecture | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 2005-11-08 |
| 6950909 | System and method for reducing contention in a multi-sectored cache | Derek E. Williams | 2005-09-27 |
| 6944721 | Asynchronous non-blocking snoop invalidation | Ravi Kumar Arimilli | 2005-09-13 |
| 6910062 | Method and apparatus for transmitting packets within a symmetric multiprocessor system | Ravi Kumar Arimilli, Jody B. Joyner, Jerry Don Lewis | 2005-06-21 |
| 6880073 | Speculative execution of instructions and processes before completion of preceding barrier operations | Ravi Kumar Arimilli, John Steven Dodson, Derek E. Williams | 2005-04-12 |
| 6874063 | System bus read data transfers with data ordering control bits | Ravi Kumar Arimilli, Vicente Enrique Chung, Jody B. Joyner | 2005-03-29 |
| 6848003 | Multi-node data processing system and communication protocol that route write data utilizing a destination ID obtained from a combined response | Ravi Kumar Arimilli, James Stephen Fields, Jr., Jody B. Joyner, Jerry Don Lewis | 2005-01-25 |