Issued Patents 2005
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6971054 | Method and system for determining repeatable yield detractors of integrated circuits | Raymond J. Kurtulik, Richard F. Rizzolo | 2005-11-29 |
| 6967556 | High power space transformer | Paul M. Gaschke | 2005-11-22 |
| 6968489 | Pseudo random optimized built-in self-test | Timothy J. Koprowski | 2005-11-22 |
| 6961886 | Diagnostic method for structural scan chain designs | Phillip J. Nigh, Phong T. Tran | 2005-11-01 |
| 6883717 | Secure credit card employing pseudo-random bit sequences for authentication | Edward E. Kelley | 2005-04-26 |
| 6865501 | Using clock gating or signal gating to partition a device for fault isolation and diagnostic data collection | Leendert M. Huisman, William V. Huott, Leah Pfeifer Pastel | 2005-03-08 |