TK

Teruhiko Kamigata

Fujitsu Limited: 1 patents #827 of 2,894Top 30%
Overall (2005): #90,527 of 245,428Top 40%
1
Patents 2005

Issued Patents 2005

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6868472 Method of Controlling and addressing a cache memory which acts as a random address memory to increase an access speed to a main memory Hideo Miyake, Atsuhiro Suga, Yasuki Nakamura, Hitoshi Yoda, Hiroshi Okano +1 more 2005-03-15