Issued Patents 2005
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6889315 | Processor and method of controlling the same | Hideo Miyake, Yasuki Nakamura | 2005-05-03 |
| 6868472 | Method of Controlling and addressing a cache memory which acts as a random address memory to increase an access speed to a main memory | Hideo Miyake, Yasuki Nakamura, Teruhiko Kamigata, Hitoshi Yoda, Hiroshi Okano +1 more | 2005-03-15 |