RP

Robert J. Palermo

CS Cadence Design Systems: 1 patents #18 of 77Top 25%
📍 Johnson City, TN: #4 of 20 inventorsTop 20%
🗺 Tennessee: #208 of 1,067 inventorsTop 20%
Overall (2005): #111,128 of 245,428Top 50%
1
Patents 2005

Issued Patents 2005

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6877143 System and method for timing abstraction of digital logic circuits Karem A. Sakallah, Shekaripuram V. Venkatesh, Mohammad Mortazavi 2005-04-05