Issued Patents 2005
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6980028 | Dedicated input/output first in/first out module for a field programmable gate array | William C. Plants | 2005-12-27 |
| 6980027 | Synchronous first-in/first-out block memory for a field programmable gate array | Daniel Elftmann, Theodore Speers | 2005-12-27 |
| 6976185 | Delay locked loop for an FPGA architecture | William C. Plants, Nikhil Mazumder, James D. Joseph, Wayne W. Wong | 2005-12-13 |
| 6946871 | Multi-level routing architecture in a field programmable gate array having transmitters and receivers | Venkatesh Narayanan, John McCollum, William C. Plants | 2005-09-20 |
| 6891396 | Repeatable block producing a non-uniform routing architecture in a field programmable gate array having segmented tracks | Eric A. Sather, William C. Plants | 2005-05-10 |
| 6867615 | Dedicated input/output first in/first out module for a field programmable gate array | William C. Plants | 2005-03-15 |
| 6838902 | Synchronous first-in/first-out block memory for a field programmable gate array | Daniel Elftmann, Theodore Speers | 2005-01-04 |