Issued Patents 2004
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6745160 | Verification of scheduling in the presence of loops using uninterpreted symbolic simulation | Pranav Ashar, Anand Raghunathan, Subhrajit Bhattacharya | 2004-06-01 |
| 6728665 | SAT-based image computation with application in reachability analysis | Zijiang Yang, Pranav Ashar | 2004-04-27 |