Issued Patents 2004
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6816825 | Simulation vector generation from HDL descriptions for observability-enhanced statement coverage | Srinivas Devadas, Farzan Fallah | 2004-11-09 |
| 6816827 | Verification method for combinational loop systems | Yang Xia | 2004-11-09 |
| 6745160 | Verification of scheduling in the presence of loops using uninterpreted symbolic simulation | Anand Raghunathan, Subhrajit Bhattacharya, Aarti Gupta | 2004-06-01 |
| 6728665 | SAT-based image computation with application in reachability analysis | Aarti Gupta, Zijiang Yang | 2004-04-27 |