Issued Patents 2004
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6825095 | Methods of forming capacitors | Kunal R. Parekh, John K. Zahurak | 2004-11-30 |
| 6788603 | ROM embedded DRAM with bias sensing | Scott J. Derner, Casey Kurth | 2004-09-07 |
| 6785167 | ROM embedded DRAM with programming | Casey Kurth, Scott J. Derner | 2004-08-31 |
| 6781867 | Embedded ROM device using substrate leakage | Casey Kurth, Scott J. Derner | 2004-08-24 |
| 6771529 | ROM embedded DRAM with bias sensing | Scott J. Derner, Casey Kurth | 2004-08-03 |
| 6768664 | ROM embedded DRAM with bias sensing | Scott J. Derner, Casey Kurth | 2004-07-27 |
| 6753617 | Method for improving a stepper signal in a planarized surface over alignment topography | William A. Stanton, Kunal R. Parekh | 2004-06-22 |
| 6747889 | Half density ROM embedded DRAM | Scott J. Derner, Casey Kurth | 2004-06-08 |
| 6737730 | High-pressure anneal process for integrated circuits | Richard H. Lane | 2004-05-18 |
| 6735108 | ROM embedded DRAM with anti-fuse programming | Casey Kurth, Scott J. Derner | 2004-05-11 |
| 6731556 | DRAM with bias sensing | Scott J. Derner, Casey Kurth | 2004-05-04 |
| 6710390 | Capacitors and DRAM arrays | Kunal R. Parekh, John K. Zahurak | 2004-03-23 |
| 6703325 | High pressure anneal process for integrated circuits | Richard H. Lane | 2004-03-09 |
| 6703327 | High-pressure anneal process for integrated circuits | Richard H. Lane | 2004-03-09 |
| 6703326 | High-pressure anneal process for integrated circuits | Richard H. Lane | 2004-03-09 |
| 6693048 | High-pressure anneal process for integrated circuits | Richard H. Lane | 2004-02-17 |
| 6673726 | High-pressure anneal process for integrated circuits | Richard H. Lane | 2004-01-06 |