GB

George E. Bailey

Lsi Logic: 2 patents #73 of 528Top 15%
🗺 Ohio: #564 of 5,375 inventorsTop 15%
Overall (2004): #64,650 of 270,089Top 25%
2
Patents 2004

Issued Patents 2004

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6782525 Wafer process critical dimension, alignment, and registration analysis simulation tool Mario Garza, Neal Callan, Travis Brist, Paul G. Filseth 2004-08-24
6764749 Method to improve the resolution of a photolithography system by use of a coupling layer between the photo resist and the ARC Michael Berman 2004-07-20