Issued Patents 2004
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6825698 | Programmable high speed I/O interface | Bonnie I. Wang, Chiakang Sung, Joseph Huang, Khai Nguyen | 2004-11-30 |
| 6825692 | Input buffer for multiple differential I/O standards | Jonathan Chung, In Whan Kim, Chiakang Sung, Bonnie I. Wang, Xiaobao Wang +5 more | 2004-11-30 |
| 6806733 | Multiple data rate interface architecture | Chiakang Sung, Joseph Huang, Yan Chong, Bonnie I. Wang | 2004-10-19 |
| 6766505 | Parallel programming of programmable logic using register chains | Gopi Rangan, Khai Nguyen, Chiakang Sung, Xiaobao Wang, In Whan Kim +3 more | 2004-07-20 |
| 6747903 | Configurable decoder for addressing a memory | Chiakang Sung, Joseph Huang, Bonnie I. Wang, Khai Nguyen, Xiaobao Wang +4 more | 2004-06-08 |
| 6731137 | Programmable, staged, bus hold and weak pull-up for bi-directional I/O | Gopinath Rangan, Chiakang Sung, Xiaobao Wang, Yan Chong, In Whan Kim +4 more | 2004-05-04 |
| 6714044 | Hi-speed parallel configuration of programmable logic | Gopi Rangan, Khai Nguyen, Chiakang Sung, Xiaobao Wang, In Whan Kim +3 more | 2004-03-30 |