Issued Patents 2004
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6836164 | Programmable phase shift circuitry | Bonnie I. Wang, Joseph Huang, Xiaobao Wang, In Whan Kim, Wayne Yeung +1 more | 2004-12-28 |
| 6825698 | Programmable high speed I/O interface | Bonnie I. Wang, Joseph Huang, Khai Nguyen, Philip Pan | 2004-11-30 |
| 6825692 | Input buffer for multiple differential I/O standards | Jonathan Chung, In Whan Kim, Philip Pan, Bonnie I. Wang, Xiaobao Wang +5 more | 2004-11-30 |
| RE38651 | Variable depth and width memory device | Wanli Chang, Joseph Huang, Richard G. Cliff, L. Todd Cope, Cameron McClintock +3 more | 2004-11-09 |
| 6806733 | Multiple data rate interface architecture | Philip Pan, Joseph Huang, Yan Chong, Bonnie I. Wang | 2004-10-19 |
| 6798237 | On-chip impedance matching circuit | Xiaobao Wang, Bonnie I. Wang, Khai Nguyen | 2004-09-28 |
| 6785109 | Technique for protecting integrated circuit devices against electrostatic discharge damage | Cheng-Hsiung Huang, John C. Costello | 2004-08-31 |
| 6766505 | Parallel programming of programmable logic using register chains | Gopi Rangan, Khai Nguyen, Xiaobao Wang, In Whan Kim, Yan Chong +3 more | 2004-07-20 |
| 6747903 | Configurable decoder for addressing a memory | Philip Pan, Joseph Huang, Bonnie I. Wang, Khai Nguyen, Xiaobao Wang +4 more | 2004-06-08 |
| 6731142 | Circuit for providing clock signals with low skew | Bonnie I. Wang, Khai Nguyen, Joseph Huang, Xiaobao Wang, In Whan Kim +4 more | 2004-05-04 |
| 6731137 | Programmable, staged, bus hold and weak pull-up for bi-directional I/O | Gopinath Rangan, Xiaobao Wang, Philip Pan, Yan Chong, In Whan Kim +4 more | 2004-05-04 |
| 6714044 | Hi-speed parallel configuration of programmable logic | Gopi Rangan, Khai Nguyen, Xiaobao Wang, In Whan Kim, Yan Chong +3 more | 2004-03-30 |
| 6707399 | Data realignment techniques for serial-to-parallel conversion | Bonnie Wang, Khai Nguyen, Joseph Huang, Gopi Rangan, Nitin Prasad | 2004-03-16 |
| 6691267 | Technique to test an integrated circuit using fewer pins | Khai Nguyen, Bonnie I. Wang, Joseph Huang, Xiaobao Wang | 2004-02-10 |
| 6686769 | Programmable I/O element circuit for high speed logic devices | Khai Nguyen, Bonnie I. Wang, Joseph Huang, Phillip Pan, In Whan Kim +4 more | 2004-02-03 |
| 6681378 | Programming mode selection with JTAG circuits | Xiaobao Wang, Joseph Huang, Bonnie I. Wang, Khai Nguyen, Richard G. Cliff | 2004-01-20 |