Issued Patents 2004
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6832361 | System and method for analyzing power distribution using static timing analysis | Scott Whitney Gould, Ronald D. Rose, Ivan L. Wemple, Paul S. Zuchowski | 2004-12-14 |
| 6825711 | Power reduction by stage in integrated circuit | Kenneth J. Goodnow, Scott Whitney Gould, Douglas W. Stout, Sebastian T. Ventrone | 2004-11-30 |
| 6792582 | Concurrent logical and physical construction of voltage islands for mixed supply voltage designs | Alvar A. Dean, David J. Hathaway, David E. Lackey, Thomas Lepsic, Susan K. Lichtensteiger +2 more | 2004-09-14 |
| 6751744 | Method of integrated circuit design checking using progressive individual network analysis | Robert J. Allen, David J. Hathaway | 2004-06-15 |
| 6711719 | Method and apparatus for reducing power consumption in VLSI circuit designs | Alvar A. Dean, Amir Farrahi, David J. Hathaway, Thomas Lepsic, Patrick E. Perry +2 more | 2004-03-23 |
| 6687883 | System and method for inserting leakage reduction control in logic circuits | Alvar A. Dean, David J. Hathaway, Sebastian T. Ventrone | 2004-02-03 |