Issued Patents 2004
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6836849 | Method and apparatus for controlling power and performance in a multiprocessing system according to customer level operational requirements | Bishop Brock, Mark A. Johnson, Thomas Walter Keller, Kevin John Nowka | 2004-12-28 |
| 6826110 | Cell circuit for multiport memory using decoder | Sang Hoo Dhong, Shoji Onishi, Osamu Takahashi | 2004-11-30 |
| 6820142 | Token based DMA | Ravi Nair, John-David Wellman | 2004-11-16 |
| 6793123 | Packaging for multi-processor shared-memory system | Eric A. Johnson, Randall J. Stutzman, Jamil A. Wakil | 2004-09-21 |
| 6785841 | Processor with redundant logic | Chekib Akrout, James Allan Kahle | 2004-08-31 |
| 6779049 | Symmetric multi-processing system with attached processing units being able to access a shared memory without being structurally configured with an address translation mechanism | Erik R. Altman, Peter G. Capek, Michael K. Gschwind, James Allan Kahle, Ravi Nair +4 more | 2004-08-17 |
| 6772368 | Multiprocessor with pair-wise high reliability mode, and method therefore | Sang Hoo Dhong, Ravi Nair, Steven Douglas Posluszny | 2004-08-03 |
| 6760819 | Symmetric multiprocessor coherence mechanism | Sang Hoo Dhong, Charles Ray Johns, John Liberty, Thuong Quang Truong | 2004-07-06 |
| 6751749 | Method and apparatus for computer system reliability | Ravi Nair | 2004-06-15 |
| 6728872 | Method and apparatus for verifying that instructions are pipelined in correct architectural sequence | Brian King Flacks | 2004-04-27 |
| 6717882 | Cell circuit for multiport memory using 3-way multiplexer | Sang Hoo Dhong, Shoji Onishi, Osamu Takahashi | 2004-04-06 |
| 6708267 | System and method in a pipelined processor for generating a single cycle pipeline stall | Brian King Flacks, Osamu Takahashi | 2004-03-16 |