Issued Patents 2004
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6780776 | Nitride offset spacer to minimize silicon recess by using poly reoxidation layer as etch stop layer | John G. Pellerin, William G. En, Mark W. Michael, Darin A. Chan | 2004-08-24 |
| 6713357 | Method to reduce parasitic capacitance of MOS transistors | Hai Hong Wang, Mark W. Michael, William G. En, John G. Pellerin | 2004-03-30 |