GT

Giap H. Tran

LS Lattice Semiconductor: 3 patents #7 of 53Top 15%
📍 San Jose, CA: #249 of 2,756 inventorsTop 10%
🗺 California: #2,413 of 28,521 inventorsTop 9%
Overall (2003): #30,428 of 273,478Top 15%
3
Patents 2003

Issued Patents 2003

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
6621298 Variable grain architecture for FPGA integrated circuits Om P. Agrawal, Herman M. Chang, Bradley A. Sharpe-Geisler 2003-09-16
6590415 Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources Om P. Agrawal, Bradley A. Sharpe-Geisler, Herman M. Chang, Bai Nguyen 2003-07-08
6526558 Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources Om P. Agrawal, Bradley A. Sharpe-Geisler, Herman M. Chang, Bai Nguyen 2003-02-25